TEST DEVICE AND TEST METHOD

专利名称：TEST DEVICE AND TEST METHOD发明人：KANTAKE, SHUSUKE申请号：EP05720641申请日：20050311公开号：EP1742074A4公开日：20090701

摘要：A testing apparatus according to the present invention includes: a clockgenerating circuit for generating a reproduced clock of which frequency and phase aresubstantially the same as frequency of the reference clock and phase of output data of adevice under test, respectively; a delay circuit for generating a strobe for delaying thereproduced clock; a timing comparator for obtaining an output value of the output databased on the strobe; a logic comparing unit for comparing the output value with apredetermined expectation value; and a pass/fail determining module for determiningpass/ fail of the device under test based on the comparison result of the logic comparingunit, and the clock generating circuit includes: a first phase comparing unit for comparingphase of the output data of the device under test with that of the reproduced clock andoutputting a first comparison result signal; a second phase comparing unit for comparingphase of the reference clock with that of the reproduced clock and outputting a secondcomparison result signal; and a reproduced clock generating module for generating thereproduced clock based on the first and second comparison result signals.

申请人：ADVANTEST CORPORATION

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